1. Field of the Invention
The present invention relates to a semiconductor integrated circuit having an AD converter or a DA converter, and more particularly to a method for reducing power consumption.
2. Description of the Related Art
AD converters convert an analog signal into a plurality of bits of digital signal in synchronization with sampling pulses. Similarly, DA converters convert a plurality of bits of digital signal into an analog signal in synchronization with sampling pulses. The operating speeds of the AD converters and DA converters depend on the frequencies of the sampling pulses (sampling frequencies). The higher the sampling frequencies are, the higher the power consumptions are. Thus, the AD converters and DA converters are so designed that they are supplied with sufficient power supply currents at maximum sampling frequencies. In general, currents that flow steadily through the AD converters and DA converters are independent of the sampling frequencies. This means the consumption of power supply currents higher than necessary even when the sampling frequencies are low.
In order to optimize the power consumption of an AD converter, there have been proposed methods for adjusting the power supply current of the AD converter stepwise by means of control signals which indicate the operation mode (for example, Japanese Unexamined Patent Application Publication No. 2000-201076).